1. Field
This disclosure relates generally to processes for forming semiconductor devices, and more specifically, to processes for forming a 3-D semiconductor die structure with an intermetallic formation.
2. Related Art
Traditional methods for forming a 3-D semiconductor die structure include metal-to-metal bonding of two wafers or dice. As part of this process, typically copper-tin metallurgy is used to form bonding pads. Thus, for example, a top die may have a bonding pad with copper and tin. The bottom die may have a copper bonding pad. The bottom die may also have a layer of no-flow underfill or a temporary adhesive. The top die is then typically aligned and placed on top of the bottom die and the two are subjected to thermo-compression bonding. The tin in the bonding pad of the top die, which may be formed using electroplating or immersion plating, is very rough. This results in the trapping of the no-flow underfill or the temporary adhesive material between bonding pads. The trapped no-flow underfill or the temporary adhesive material can cause reliability problems with the bond between the top die and the bottom die.
Accordingly, there is a need for processes for forming a 3-D semiconductor die structure with an intermetallic formation.